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논문 기본 정보

자료유형
학술대회자료
저자정보
Yasuhiro NISHINAGA (Hiroshima City University) Takuro UCHIDA (Hiroshima City University) Tetsuya ZUYAMA (Hiroshima City University) Kazuya TANIGAWA (Hiroshima City University) Tetsuo HIRONAKA (Hiroshima City University)
저널정보
대한전자공학회 ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications ITC-CSCC : 2008
발행연도
2008.7
수록면
405 - 408 (4page)

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We have developed the dynamic reconfigurable processor DS-HIE for the streaming processing in our laboratory. The software development environment for the DS-HIE processor was not developed. So it is difficult to evaluate the performance of the DS-HIE processor by using practical applications. Therefore, this paper explains about the development of the compiler for the DS-HIE processor, which supports high-level programming language. The compiler consists of the Front-end part and the Back-end part. Since it will take time to develop a high quality Front-end from the scratch, so we selected the COINS compiler as the Front-end compiler. The Back-end compiler extracts the parts executed by the DS-HIE processor in the input program, and then maps the operations to the Function Units in the DS-HIE processor. After that, the Back-end compiler routes wires between the Function Units. The applications to evaluate the compiler were one dimensional DCT and row processing of LDCP decoding. As a compilation result, the average usage of the function unit was 83%

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Abstract
1. Introduction
2. DS-HIE processor
3. DS-HIE Compiler
4. Back-end compiler
5. Evaluation
6. Conclusion
Acknowledgement
References

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UCI(KEPA) : I410-ECN-0101-2013-569-001139536