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연구자들이 자신의 연구와 전문성을 널리 알리고, 새로운 협력의 기회를 만들 수 있는 네트워킹 공간이에요.
논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 저널정보
- 대한전자공학회 ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications ITC-CSCC : 2008
- 발행연도
- 2008.7
- 수록면
- 213 - 216 (4page)
이용수
초록· 키워드
오류제보하기
When the dynamic reconfigurable processors run, a lot of Processing Elements (PE) are changed by the context which is written information of circuit configuration. Some PEs execute heavy operations, while other PEs execute light operation. Therefore, the delay time of each PE changes with the contexts. We propose a technique to dynamically change dual supply voltages at each PE.
First, we calculate the delay of each PE under the context. Next, we define the standard delay. The standard delay is the longest delay of each PE. Then we assign the standard or lower voltage to each PE. If the PE’s delay at the lower voltage is longer than the standard, this PE is assigned the standard voltage. If shorter than the standard delay, this PE is assigned the lower voltage. Finally, we calculate the power consumption with the technique of dual supply voltage by using the number of assignment the each voltage.
When the same voltage was assigned to, the power consumption was reduced by 18.7%. When the voltage is assigned PE-by-PE individually, the power consumption was reduced by 20.3%.
First, we calculate the delay of each PE under the context. Next, we define the standard delay. The standard delay is the longest delay of each PE. Then we assign the standard or lower voltage to each PE. If the PE’s delay at the lower voltage is longer than the standard, this PE is assigned the standard voltage. If shorter than the standard delay, this PE is assigned the lower voltage. Finally, we calculate the power consumption with the technique of dual supply voltage by using the number of assignment the each voltage.
When the same voltage was assigned to, the power consumption was reduced by 18.7%. When the voltage is assigned PE-by-PE individually, the power consumption was reduced by 20.3%.
목차
Abstract
1. Introduction
2. Dynamic Reconfigurable Processor
3. Application of Dual Supply Voltages for MuCCRA-D
4. Evaluation Results
5. Conclusion
6. Future Work
Acknowledgements
References
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UCI(KEPA) : I410-ECN-0101-2013-569-001139056