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학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
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논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전기학회 Journal of Electrical Engineering & Technology Journal of Electrical Engineering & Technology Vol.6 No.3
- 발행연도
- 2011.5
- 수록면
- 418 - 422 (5page)
이용수
초록· 키워드
오류제보하기
For low-power sensor networks, a compact design of advanced encryption standard (AES) algorithm is needed. A very small AES core for ZigBee devices that accelerates computation in AES algorithms is proposed in this paper. The proposed AES core requires only one S-Box, which plays a major role in the optimization. It consumes less power than other block-wide and folded architectures because it uses fewer logic gates. The results show that the proposed design significantly decreases power dissipation; however, the resulting increased clock cycles for 128-bit block data processing are reasonable for IEEE 802.15.4 standard throughputs.
목차
Abstract
1. Introduction
2. FPGA Design Platform
3. Design Criteria: Power vs. Area
4. Small Design of the AES Algorithm
5. Conclusion
Acknowledgements
References
참고문헌 (11)
참고문헌 신청
Y. Xiao / 2006 / MAC Security and Security OverheadAnalysis in the IEEE 802.15.4 Wireless SensorNetworks / EURASIP Journal on Wireless Communicationsand Networking :1~12
A. Dandalis / 2000 / A Comparative Study of Performanceof AES Final Candidates Using FPGAs / Lecture Notes in Computer Science 1965:133~153
P. Chodowiec / 2003 / Very compact FPGA implementationof the AES algorithm / Lecture Notes inComputer Science 2779:319~333
M. Feldhofer / 2005 / implementation on a grainof sand / IEE Proc. Inf. Secur 152(1):13~20
P. Hämäläinen / 2006 / Design and implementation oflow-area and low-power AES encryption hardwarecore / 9th Euromicro Conf. on Digital System Design :577~583
A. Dandalis / 2000 / A Comparative Study of Performanceof AES Final Candidates Using FPGAs / Lecture Notes in Computer Science 1965:133~153
P. Chodowiec / 2003 / Very compact FPGA implementationof the AES algorithm / Lecture Notes inComputer Science 2779:319~333
M. Feldhofer / 2005 / implementation on a grainof sand / IEE Proc. Inf. Secur 152(1):13~20
P. Hämäläinen / 2006 / Design and implementation oflow-area and low-power AES encryption hardwarecore / 9th Euromicro Conf. on Digital System Design :577~583
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UCI(KEPA) : I410-ECN-0101-2012-560-004498460