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학술연구/단체지원/교육 등 연구자 활동을 지속하도록 DBpia가 지원하고 있어요.
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논문 기본 정보
- 자료유형
- 학술대회자료
- 저자정보
- 저널정보
- 대한전자공학회 ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications ITC-CSCC : 2009
- 발행연도
- 2009.7
- 수록면
- 424 - 427 (4page)
이용수
초록· 키워드
오류제보하기
As the use of the mobile electronic devices increases very rapidly, low power becomes one of the most important design issues of CMOS VLSI circuits. A multi-VDD system, which uses more than one power-supply voltage in the same system, is an effective way to reduce the power consumption without degrading operating speed. However, in the multi-VDD system, level converters which convert the low power-supply voltage into the high power-supply voltage should be inserted to prevent a large static current flow. The insertion of the level converters induces the overheads of power consumption, delay, and area. In this paper, we propose a new level converter for the multi-VDD system. Since the proposed level converter uses only one power-supply voltage, it has an advantage of reducing the complexity in physical design. In addition, the proposed level converter provides lower power and higher speed, compared to existing level converters.
목차
Abstract
1. Introduction
2. Proposed level converter
3. Experimental results
4. Conclusion
Acknowledgements
References
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UCI(KEPA) : I410-ECN-0101-2012-569-004020730