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논문 기본 정보
- 자료유형
- 학술저널
- 저자정보
- 저널정보
- 대한전자공학회 JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE Journal of Semiconductor Technology and Science Vol.10 No.1
- 발행연도
- 2010.3
- 수록면
- 49 - 54 (6page)
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초록· 키워드
오류제보하기
This paper describes a fast circuit simulation technique using the latency insertion method (LIM) with a parallel and distributed leapfrog algorithm. The numerical simulation results on the PC cluster system that uses the cloud computing system are shown. As a result, it is confirmed that our method is very useful and practical.
목차
Abstract
Ⅰ. INTRODUCTION
Ⅱ. LATENCY INSERTION METHOD
Ⅲ. PARALLEL-DISTRIBUTED LIM
Ⅳ. NUMERICAL RESULTS
Ⅴ. CONCLUSIONS
REFERENCES
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UCI(KEPA) : I410-ECN-0101-2010-569-002142537