A SAR-type analog-to-digital converter using 2-stage pipelined architecture

Ju Eon Kim ,  Kwang-Hyun Baek

대한전자공학회 ISOCC

2012 .11

저전압 고속 전류형 Pipelined A/D 변환기의 설계 ( Design of A Low - Voltage and High - Speed Pipelined A/D Converter Using Current - Mode Signals )

박승균 ,  이희덕 ,  한철희

전자공학회논문지-A

1994 .03

Design of 10-bit 20 Msps Pipelined A / D Converter

Chae-Hoon Kim ,  Jong-Hyun Kim ,  Pyung Choi

대한전자공학회 ISOCC

2005 .10

An Algorithm for Software Interlock in Pipelined Architectures

Eun Sung Kim ,  In Chil Lim

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1988 .01

High-Speed , Low-Power CMOS Pipelined Analog to Digital Converter

Rai A Ju ,  Sang Dae Yu

ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications

1998 .01

H.264/AVC의 효율적인 파이프라인 구조를 적용한 CABAC 하드웨어 설계

오명석 ,  이원재 ,  정윤호 외 1명

대한전자공학회 학술대회

2007 .11

A New Pipelined DCT Architecture for HDTV Applications

Tae Young Lee

KITE JOURNAL OF ELECTRONICS ENGINEERING

1995 .01

다단 12-비트 고속 파이프라인 A/D 변환기의 구조 설계 ( An Architecture Design of a Multi-Stage 12-bit High-Speed Pipelined A/D Converter )

임신일 ,  이승훈

전자공학회논문지-A

1995 .12

저전력 설계를 위한 비교기 기반의 파이프라인 AD변환기 분석

최순경 ,  공기호 ,  김두연 외 3명

대한전자공학회 학술대회

2009 .07

A Memory-Based Pipelined Architecture for Blocking Effect Removal in HDTV

Jae Wook Lee ,  Myung Hoon Yang ,  Sung Ho Kang 외 1명

ICVC : International Conference on VLSI and CAD

1997 .01

Edge-Preserving Algorithm for Block Artifact Reduction and Its Pipelined Architecture

T ,  uong Quang Vinh ,  Young-Chul Kim

[ETRI] ETRI Journal

2010 .06

AN EXTENDED PIPELINED LOGIC SIMULATOR

Itthichai A ,  ungs ,  isangchai 외 4명

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1989 .01

Design of 10-bit 20 MHz Pipelined A / D Converter For digital decoder of DTV

Jong-Hyun Kim ,  Sin-Hwan Lim ,  Pyung Choi

대한전자공학회 ISOCC

2006 .10

A Distributed Control Model for Pipelined Data-path Synthesis

Sun Young Hwang

KITE JOURNAL OF ELECTRONICS ENGINEERING

1991 .01

Through Optimization in Pipelined Data-Path Scheduling

Hiuono ,  i Komi ,  Katsumi Ha 외 2명

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1993 .01

메모리 효율성을 높인 Pipelined FFT 프로세서의 설계

양준석 ,  김기철

한국통신학회 학술대회논문집

2004 .11

A 9-Bit 80-MS/s CMOS Pipelined Folding A/D Converter with an Offset Canceling Technique

Seung-Chul Lee ,  Young-Deuk Jeon ,  Jong-Kee Kwon

[ETRI] ETRI Journal

2007 .06

Scalable Pipelined Architecture for Systolic Memory using Diagonal Data Flow

Kyoung Hwan Kwon ,  Gab Joong Jeong ,  Moon Key Lee 외 1명

ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications

1996 .01

Register-Transfer Synthesis of Pipelined Data Paths

박노병

대한전자공학회 학술대회

1993 .01

A Design of a Multistandard Digital Video Encoder using a Pipelined Architecture

Seung-Ho Oh ,  Han-Jun Choi ,  Sung-Woo Kwon 외 1명

Journal of Electrical Engineering and information Science

1997 .10