Experimental Evaluation of Rollbacks in Parallel Logic Simulation for Tree-Connected Circuit

Tadashi Seko ,  Shigeyuki Nishino ,  Toh 외 1명

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1994 .01

Logic Simulation

권태욱

대한전자공학회 단기강좌

1983 .01

Experimental Evaluation of Processor Scheduling Algorithm for Parallel Logic Simulation

Tadashi Seko ,  Takeshi Kugo ,  Fang Wang 외 2명

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1993 .01

Parallel R. O. E에 대한 계통의 Simulation에 관한 연구

윤석무 ,  신명철

대한전기학회 학술대회 논문집

1984 .07

Hazard Detection Algorithm for Logic Simulation

Min Sup Kang ,  Chul Dong Lee ,  Young Uk Yu 외 2명

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1988 .01

Grid-Enabled Parallel Simulation Based on Parallel Equation Formulation

Bojan Andjelkovic ,  Vančo B. Litovski ,  Volke 외 2명

[ETRI] ETRI Journal

2010 .08

PARALLEL MULTI-DELAY SIMULATION

Yun Sik Lee ,  Chun Kyung Kim ,  Pete 외 2명

ICVC : International Conference on VLSI and CAD

1995 .01

Simulation of the Air Conditioning System Using Fuzzy Logic Control

M.Mongkolwong ,  ojn ,  W. Sa 외 1명

제어로봇시스템학회 국제학술대회 논문집

2003 .10

확장논리에 기초한 순차디지털논리시스템 및 컴퓨터구조에 관한 연구

박춘명

한국인터넷방송통신학회 논문지

2008 .01

Logic Synthesis

황선영

CAD기술특강

1989 .01

Fuzzy logic 기반 parallel HEV 동력 제어 모델 개발

서지구 ,  장지환 ,  최용현 외 3명

한국자동차공학회 추계학술대회 및 전시회

2018 .11

LOGIC-CHECKER : A CORRECTING FUNCTION FOR GATE ERRORS IN LOGIC SIMULATION AND ITS IMPLEMENTATION

Satoshi Wakabayashi ,  Hi ,  oyuki Ishikawa 외 1명

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1989 .01

A Proposal for Implementing Parallel Logic Programming Languages on the Connection Machine

Ma ,  tin Nilsson ,  Hidehiko Tanaka

TENCON 87 - Computers and Communications Technology Toward 2000

1997 .01

Efficient Algorithms for Assigning Parallel Tasks to a Minimum Number of Parallel Processors

Takao Ozawa ,  Yoji Kajitani ,  Shuichi Ueno

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1986 .01

A Parallel Algorithm for Finding E-Tree

No ,  ihiko Shinomiya ,  Hitoshi Watanabe

ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications

1997 .01

연관분석을 이용한 마코프 논리네트워크의1차 논리 공식 생성과 가중치 학습방법

안길승 ,  허선

산업경영시스템학회지

2015 .01

Low-Power Parallel Multiplier Using MOS Current Mode Logic Circuit

Yoon Sang Lee ,  Jeong Beom Kim

대한전자공학회 ISOCC

2007 .10

Parallel Circuit Simulation Based on a Relaxation Method

Tetsuo Kaga ,  Junnichi Niitsuma ,  Fumuyo Kawafuji

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1995 .01

논리 세기 개념을 이용한 논리 레벨 시뮬레이션 ( Logic Level Simulation Using The Logic Strength Concept )

이홍주 ,  박홍준 ,  함승재 외 2명

대한전자공학회 학술대회

1987 .11