Dedicated parallel Processor SMASH for Sparse LU Decomposition

Nobuyuki Tanaka ,  Hideki Asai

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1990 .01

An Optimal Implementation of Digital Filters on Multiple Pipelined Processors

Chun Pyo Hong ,  Jong Jung Woo

대한전자공학회 기타 간행물

1994 .01

A Pipelined Hadamard Transform Processor

Moon Ho Lee ,  Geun Ho Yang ,  Yasuhiko Yasuda

ICVC : International Conference on VLSI and CAD

1989 .01

Speech Denoising via Low-Rank and Sparse Matrix Decomposition

Jianjun Huang ,  Xiongwei Zhang ,  Yafei Zhang 외 2명

[ETRI] ETRI Journal

2014 .02

병렬 파이프라인 프로세서 아키텍처의 설계 ( Design of a Parallel Pipelined Processor Architecture )

이상정 ,  김광준

전자공학회논문지-B

1995 .03

메모리 효율성을 높인 Pipelined FFT 프로세서의 설계

양준석 ,  김기철

한국통신학회 학술대회논문집

2004 .11

효율적인 MPI 병렬 LU 분해 프로그램의 구현

이승철 ,  김대원 ,  김영태

한국정보과학회 학술발표논문집

2018 .12

Pipelined Implementation for the CORDIC Rotation Processor

Seung Geun Kim ,  Ki Seon Kim ,  Jeong A Lee

ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications

1996 .01

A HYBRID SCHEME USING LU DECOMPOSITION AND PROJECTION MATRIX FOR DYNAMIC ANALYSIS OF CONSTRAINED MULTIBODY SYSTEMS

W. s. YOO ,  S. H. KIM ,  O. J. KIM

International journal of automotive technology

2001 .09

Effect of Sparse Decomposition on Various ICA Algorithms With Application to Image Data

Asif Khan ,  Intaek Kim

대한전자공학회 학술대회

2008 .06

대형 Sparse 선형시스템 방정식을 풀기 위한 효과적인 병렬 알고리즘 ( An Efficient Parallel Algorithm for Solving Large Sparse Linear Systems of Equations )

채수환 ,  이진

한국통신학회논문지

1989 .08

Sparse행렬을 이용한 증폭회로의 최적설계에 관한 연구 ( A Study on the Optimization Design for Amplification Circuit Using Sparse Matrix )

강순덕 ,  마경희

한국통신학회지(정보와통신)

1980 .01

Low-Complexity Pipelined FFT Processor for MIMO-OFDM Systems

Sangmin Lee ,  Yunho Jung ,  Jaeseok Kim

대한전자공학회 ISOCC

2007 .10

저전압 고속 전류형 Pipelined A/D 변환기의 설계 ( Design of A Low - Voltage and High - Speed Pipelined A/D Converter Using Current - Mode Signals )

박승균 ,  이희덕 ,  한철희

전자공학회논문지-A

1994 .03

High Performance Current Controller for Sparse Matrix Converter Based on Model Predictive Control

Eunsil Lee ,  Kyo-Beum Lee ,  Young Il Lee 외 1명

Journal of Electrical Engineering & Technology

2013 .09

AN EXTENDED PIPELINED LOGIC SIMULATOR

Itthichai A ,  ungs ,  isangchai 외 4명

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1989 .01

Performance Comparison of Two Parallel LU Decomposition Algorithms on MasPar Machines

Kim ,  Yong-Tae

전기전자학회논문지

1998 .12

A Distributed Control Model for Pipelined Data-path Synthesis

Sun Young Hwang

KITE JOURNAL OF ELECTRONICS ENGINEERING

1991 .01

Through Optimization in Pipelined Data-Path Scheduling

Hiuono ,  i Komi ,  Katsumi Ha 외 2명

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1993 .01

Efficient Algorithms for Assigning Parallel Tasks to a Minimum Number of Parallel Processors

Takao Ozawa ,  Yoji Kajitani ,  Shuichi Ueno

JTC-CSCC : Joint Technical Conference on Circuits Systems, Computers and Communications

1986 .01